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crasm - Cross assembler for 6800/6801/6803/6502/65C02/Z80


crasm [-o codefile] [-slx] asmfile

Assemble the microprocessor program asmfile and produce output file codefile in Intel HEX
or Motorola S Code format. A program listing and a symbol table are also produced on the
standard output. The current version of crasm can assemble programs for the 6800, 6801,
6803, 6502, 65C02, and Z80 processors. The full list is printed when you invoke crasm
without arguments.


-o codefile
Specify the name of the output file. No output file is produced without this

-s Disable warnings.

-l Disable program listing output.

-x Disable symbol table output.


Each line of the assembly program should follow one of the following templates, where the
brackets delimit optional parts.

label = expression [;comment]
[label] mnemonic operand [;comment]

Comments are introduced by a semicolon (;) and extend to the end of the line. Labels are
identifiers containing up to 36 alphanumeric characters (including period and underscore).
Labels cannot start with a digit. The format of the mnemonics and operands field depends
on the selected micro-processor. A few mnemonics are valid for all processors and are
used to give directives to the assembled. These are known as "pseudo-mnemonics".

Labels are identifiers representing
— an absolute address,
— a relative address (position independent code),
— a register,
— a list of registers,
— a specific bit at a specific address,
— or a mnemonic.

Most labels are composed of at most 36 alphanumeric characters, periods (.) or
underscores (_). Labels cannot start with a digit. They are case insensitive.

Labels starting with a period (.) are local labels whose scope is either limited to the
macro in which they are defined, or to the code segment delimited by the pseudo-mnemonics

The predefined "star" label (*) represents the current program counter, that is to say,
the address where the next assembly code instruction will be encoded. Other predefined
labels include all pseudo-mnemonics, micro-processor specific mnemonics and register

The assembled recognizes numerical constants expressed in decimal, hexadecimal, octal,
binary, or ascii.

Type Format Examples
│decimal dddd 1234, 675, 12, 1, but not 0.12. │
│hexadecimal $dddd $fd12, $2AC, $0. │
ddddH 03H, 2da7H, 0FC84H, but not FC84H. │
0Xdddd 0x03, 0x2AC, 0Xfc84. │
│octal ddddQ 377Q, 012412Q. │
│binary %dddd %01110110, %1100. │
ddddB 01110110B, 1100B. │
0Bdddd 0b1100
│ascii 'cccc' 'a', 'AB', '"', '\n', '\''. │
"cccc" "\t", "\"", "a'b". │
Like labels, expressions can represent an absolute address (abs), a relative address for
position independent code (rel), a register (reg), or a list of registers (reglist), or a
reference to a specific bit at a specific address (bspec).

The following operators are recognized on expressions.

Syntax Result Description
abs{abs} bspec bit reference, e.g. pia{3}
ADDR(abs) abs address from a bit reference │
BIT(abs) abs bit number from a bit reference │
- abs abs two's complement │
~ abs abs one's complement │
abs << abs abs left shift │
abs >> abs abs right shift │
abs | abs abs bitwise or │
abs & abs abs bitwise and │
abs ^ abs abs bitwise xor │
abs * abs abs multiplication │
abs * abs abs division │
abs + abs abs addition │
rel + abs rel addition │
abs - abs abs subtraction │
rel - abs rel subtraction │
rel - rel abs subtraction │
reg - reg reglist register range │
reglist \ reg reglist register list │
The table lists operators in order of decreasing precedence. Parenthesis can be used to
avoid ambiguities. A warning is generated when an entire expression is surrounded with
parenthesis and can be confused with a micro-processor addressing mode.


(base+$12) >> 8 & 0xff00

The last example causes a warning because the parenthesis were not necessary and might
suggest a micro-processor addressing mode.

All arithmetic expressions are evaluated on 32 bits. Arithmetic operations overflow
silently. The arithmetic values are then truncated to the size implied by the micro-
processor mnemonic. This truncation might cause a warning message.

Examples: all the following instructions

(6502) lda #$1234
(6800) ldaa $1234,x
(Z80) ld (ix+0C2H),b

cause a warning

>>> WARNING: Operand overflow

However expression

$1123454 * 1298992

overflows silently.

The following pseudo-mnemonics are always recognized.

CPU cpuname
Indicates the selected micro-processor type. This must appear before anu micro-
processor specific instruction. The possible values of cpuname are listed when you
invoke crasm without arguments. The current list includes 6800, 6801, 6803, 6502,
65C02, and Z80

OUTPUT binformat
Indicates the format of the output file. Argument binformat can take values SCODE
for producing an output file using Motorola's S code, or HEX for Intel's Hex
format. The default depends on the selected micro-processor.

Delimit the scope of local labels and introduce a program section.

DUMMY Delimit the scope of local labels and introduce a fake program section whose sole
effect is to define labels without generating code.

label EQU expression
label = expression
Define the value of label label. Labels defined using these directives can be
redefined later in the program.

[label] DB expression[,...,expression]
Insert the specified data bytes (8 bits).

[label] DW expression[,...,expression]
Insert the specified data words (16 bits). The byte ordering depends on the
selected micro-processor.

[label] DL expression[,...,expression]
Insert the specified data longs (32 bits). The byte ordering depends on the
selected micro-processor.

[label] DDB expression[,...,expression]
Insert the specified double bytes (16 bits). The byte ordering is the opposite of
the usual byte ordering for the selected micro-processor.

[label] ASC stringconstant
Insert the ascii representation of the string stringconstant . The string must be
delimited by double quotes. The C escape sequences \r, \n, \t, \0, \', \", and \\
are recognized.

[label] DS countexpr,[valexpr]
Insere countexpr bytes with value valexpr. The default value is zero.

[label] ALIGN EVEN
[label] ALIGN ODD
Insert a null byte in order to make the program counter even or odd.

IF condexpr
Conditional assembly: If expression condexpr is non zero, process the lines located
between the IF and the ELSE pseudo-mnemonics. Otherwise process the lines located
between the ELSE and the ENDC pseudo-mnemonics. Conditional assembly instructions
can be nested. The ELSE part can be omitted.

label MACRO
Define a new mnemonic label equivalent to all the instructions located between the
MACRO and ENDM pseudo-mnemonics. Invocations of the macro can specify a list of
comma separated operands. The character sequences \1, \2, ... \N in the macro
definition are replaced by the supplied operands. The character sequence \0 is
replaced by the number of supplied operands.

This pseudo mnemonic can be used inside a macro definition to exit the macro. This
is useful in conjunction with the conditional assembly pseudo-mnemonics.

INCLUDE filename
Force the assembler to process file named filename at the current point.

Enable or disable the production of a listing (default is on.)

Enable or disable the production of a listing for the non active branches of a
conditional assembly construct (default is on.)

Enable or disable the production of a listing for included files (default is off.)

Enable or disable the production of a listing for the macro expansions (default is

NAM title
Provide name title for the header of the listing pages.

Start a new listing page.

PAGE columns,rows
Specify the size of a listing page.

SKIP number
Skip number lines.

FAIL message
Generate an error message message.


Here is a small 6502 program:

cpu 6502
cout = $fded ; display a character
* = $300 ; assemble at $300
pstring ldy #0
.1 lda message,y
beq .2
jsr cout
.2 bne .1
message asc "This is the message "


Leon Bottou, September 1987.

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